1. Field of the Invention
The present invention relates to semiconductor integrated devices and circuits and methods of fabrication of same employing so-called SOI (semiconductor on insulator) technology, and, more particularly, to semiconductor integrated circuits and devices and to methods of fabrication thereof employing SOI technology and using an anti-reflecting film during laser beam irradiation for controlled recrystallization of the semiconductor layer.
2. State of the Prior Art
SOI technology is currently receiving increasing attention and interest due to the many attractive features which it affords, including providing semiconductor integrated circuits (IC's) with increased breakdown voltages between isolated, individual circuit components such as transistors and the like, and with reduced levels of parasitic capacitances between the circuit components and the substrate on which the circuit components are formed, affording improved operating speeds. A particularly significant feature of SOI technology is the capability afforded thereby of providing three-dimensional IC's, a structural configuration of semiconductors offering a promising technological breakthrough with regard to the limitation on integration density imposed by conventional IC technology.
In the initial, or early, stages of the evolution of SOI technology, efforts of researchers were directed to obtaining a recrystallized region which was as large as possible, in a polycrystalline semiconductor layer such as a polysilicon layer. These efforts, however, were confronted with the difficulty of forming a region at a desired, given position in the semiconductor layer which was free of grain boundaries. Where a grain boundary exists in the recrystallized region in which the active region of a transistor is formed, for example, the transistor characteristics are not comparable to those of ordinary transistors fabricated on a single crystal silicon substrate. For example, grain boundaries produce deleterious characteristics, such as increased leakage currents and nonuniformity of the threshold voltages of the transistors so affected.
More recent developments in the area of SOI technology appear to have focused on techniques for selective recrystallization of an amorphous or polycrystalline semiconductor layer. Specifically, only predetermined regions of the semiconductor layer, in each of which an active component such as a transistor is to be formed, are recrystallized into single crystal ions. Anti-reflecting film coatings, originally proposed for increasing efficiency of light beam irradiation as employed for recrystallizing a semiconducting layer, have been reported to be advantageous in performing such selective recrystallization, where the anti-reflecting film is modified into a stripe structure or pattern on the semiconductor layer to be irradiated. (See, Colinge et al., Applied Physics Letters, Vol. 41, p. 346, 1982.) In accordance with this known method, stripes of anti-reflecting film are formed in a transverse arrangement or pattern on an amorphous or polycrystalline layer. A laser beam is scanned along a center line between the stripes, the beam having a diameter of sufficient dimensions to cover at least two adjacent stripes. The level of the laser beam energy is controlled to be slightly above the lowest level necessary for melting the uncoated region of the silicon layer. Due to the higher level of absorption of the irradiating beam energy by the stripes of anti-reflecting film, as compared to the exposed regions of the silicon layer, a desired concave temperature profile in the lateral direction is achieved. This known method is described in further detail in the following, with reference to FIGS. 1(a) and 1(b).
FIGS. 1(a) and 1(b) comprise plan and elevational cross-sectional views, respectively, the latter taken along line B--B in FIG. 1(a), of a semiconductor layer on which anti-reflecting film stripes are formed and the resultant irradiation patterns afforded thereby, FIG. 1(c) comprising a plot of the concave temperature profile taken in the lateral direction relative to the stripes, namely, along the line B--B in FIG. 1(a).
More specifically, FIGS. 1(a) and 1(b) illustrate an amorphous or polycrystalline silicon layer 22, which is to be recrystallized into a single crystal silicon layer, and which is deposited on an amorphous insulating layer 21. An anti-reflecting film 23 of silicon nitride, Si.sub.3 N.sub.4, is formed on the silicon layer 22 and delineated into the parallel stripes 23. By proper control of the thickness of the anti-reflecting film stripes 23, the reflectivity of the surface of the silicon layer 22 in the regions coated with the stripes 23 is approximately 5%, by comparison to a reflectivity of 60% in the uncoated, or exposed regions. When irradiated by a suitable energy beam, such as an argon ion laser beam, having a spot diameter larger than the distance between stripes 23, a temperature distribution profile as illustrated schematically in FIG. 1(c) is obtained in the lateral direction, i.e., along the line B--B in FIG. 1(a). Thus, in FIG. 1(c), the temperature T is plotted along the ordinate and the lateral distance between two adjacent stripes 23 is plotted on the abscissa; the temperature T is seen to have a concave profile in the lateral direction, having its lowest value at the midpoint or center position between the adjacent stripes 23.
As illustrated in FIG. 1(a), as the laser beam is scanned in the direction of the arrow along the center line between the stripes 23, recrystallization front edges are formed in the silicon layer 22, having a profile or configuration schematically indicated by the two curves 25' and 25", respectively representing two successive, time-displaced positions of the front edges corresponding to displaced positions of the scanning beam as it moves along the center line between the stripes 23 in 15 the direction of the arrow, as before noted. Each curve 25' and 25" indicates a solid-liquid interface and melting point distribution in the surface of the silicon layer 22. Because of the convex curvature of the successive curves 25' 25", . . . in the scanning direction, i.e., the central portion of each curve 25' and 25" comprises the leading edge thereof and the portions displaced from the center and approaching the respective stripes 23 trail progressively further therebehind, the dominant characteristic is the growth of a crystal grain nucleated from a virtual seed on the center line, which gradually spreads over the region between the stripes 23. As a result, grain boundaries between the dominant grain thus established and other subdominant grains are swept from the region between the stripes 23 and accumulate in the portion of the layer 22 underlying the stripes 23.
A similar concave temperature profile is reported to have been achieved using a doughnut-shaped laser beam for irradiating a polysilicon layer on an amorphous layer, affording successful recrystallization (See, Kawamura et al., Applied Physics Letters, Vol. 40, p. 394, 1982).
As reported in the literature, the use of anti-reflecting film stripes permits the formation of a single crystallized region of 20.times.100 square microns in a silicon layer on an amorphous insulating layer. The striped structure or pattern of the anti-reflecting film thus achieves efficiency in the use of the laser beam and permits the beam to be of a simple, or noncomplex, cross-sectional shape, e.g., a round, cross-sectional beam may be employed.
Methods employing such stripe patterns of anti-reflecting films, however, reduce the freedom of design of the device pattern layout on the semiconductor layer. With reference to FIG. 1(a), if devices or at least the active regions of devices, such as transistors, are located respectively in the regions 26a and 26b of the semiconductor layer 22, the device in the region 26a is formed in a single-crystallized region but a device in the region 26b is formed in a region in which grain boundaries may exist, for the reasons described before. Due to the deleterious and undesirable effects of grain boundaries on a device formed therein, a device in the region 26b is not acceptable; in other words, the device pattern layout must be restricted to the region between the anti-reflecting film stripes 23. As a result, the desired characteristic of the semiconductor layer with respect to permitting a random layout or arrangement therein of devices, or at least of the active regions of devices, is substantially inhibited; instead, the devices or at least the active regions thereof must be positioned in a relatively ordered arrangement, confined to the region between the stripes 23. Thus, whereas SOI technology using anti-reflecting film stripes is suitable for the fabrication of integrated circuits having well ordered, or defined, geometric patterns such as those based on gate array methodology, it is not suitable for IC's requiring a random arrangement of the devices such as logic IC's. The anti-reflecting stripe technique or methodology thus restricts the efficient use of the total area of the semiconductor in fabricating IC's, based on SOI technology.